HP

• HP-UX Performance and Tuning
• HP-UX Troubleshooting

• Experienced HP-UX system administrators and programmers

• HP-UX system and network administration I (H3064S) and HP-UX system and network administration II (H3065S) or
• HP-UX for experienced UNIX system administrators (H5875S) or
• Equivalent experience

After completing this course you will be able to:

• Understand the role of the HP-UX kernel.
• Understand virtual addressing and cache operation.
• Define and understand kernel services and process management.
• Familiarity with multi-processor systems and interprocess communications.
• Understand memory management.
• Describe file system layouts and allocation algorithms.
• Understand LVM architecture, structures and operations.
• Understand the I/O subsystem and system initialization.

Benefits to you:

• Gain the knowledge you need to understand and optimize your HP-UX system.

Introduction

• •HP-UX structural overview
• •Kernel entry
• •Primary subsystems
• •Process management data structures
• •Memory management data structures
• •File system data structures
• •The big picture
• •Evolution of HP-UX

System architecture

• •PA-RISC architecture overview
• •Processor architecture
• •HP-UX 11.X architectural support
• •PA-RISC register context
• •IA-64 register context
• •Virtual memory concepts
• •Virtual memory layout: PA-RISC 1.1 and 2.0 narrow mode
• •Virtual memory layout: PA-RISC 2.0 wide mode
• •32-bit address space layout (PA-RISC)
• •64-bit address space layout (PA-RISC)
• •32-bit address space layout (IA-64)
• •64-bit address space layout (IA-64)
• •32- versus 64-bit HP-UX address layouts
• •Long and short pointers: narrows mode
• •Explicit and implicit pointers: PA-RISC 2.0 wide mode
• •Address swizzling
• •PA_RISC 1.1 GVA formation
• •PA_RISC 2.0 GVA formation: narrow mode
• •PA_RISC 2.0 GVA formation: wide mode
• •IA-64 SVA formation
• •Virtual to physical address translation
• •Address translation components
• •Address translation through TLB and cache
• •Cache entry
• •Searching the cache
• •Translation lookaside buffer
• •Hardware TLB miss handler
• •Access control
• •TLB/Cache summary
• •Instruction pipelining
• •Superscalar pipelined execution
• •Interrupts during instruction execution
• •Interruption groups
• •Interruption vector table for PA-RISC
• •Interruption vector table for IA-64
• •Interrupt state save for PA-RISC
• •Interrupt state save for IA-64
• •Directions for setting up Q4
• •Supplemental information

Kernel services

• •Kernel services overview
• •The system call Interface
• •System call return path
• •Kernel timeout services
• •The callout structures (11.0 and earlier)
• •The callout structures (11.11 and later)
• •Processing timeouts
• •McKusick & Karel kernel memory allocator
• •Bucket contents
• •Arena memory allocator
• •When the bucket is empty: the sysmap
• •A populated sysmap
• •Dynamically loadable kernel modules
• •DLKM commands
• •DLKM structures
• •Dynamically tunable kernel parameters
• •KRS components
• •Callout structures

Process management

• •Introduction
• •Program, process and thread definitions
• •Thread models
• •System calls for a process lifecycle
• •Process creation: fork() or vfork ()
• •Process creation: vfork() Example
• •Process change: exec()
• •Execve: call to getsfile()
• •Process termination: exit()
• •Process termination: wait()
• •Process structure layout
• •32-bit user mode address space layout (PA-RISC)
• •Limitations of 32-bit memory map
• •Allowing larger data areas (Part 1)
• •Allowing larger data areas (Part 2)
• •Allowing more shared memory
• •Shared memory windows
• •64-bit kernel mode and user mode address space layout (PA-RISC)
• •32-bit user mode address space layout (IA-64)
• •Process structure: virtual layout overview
• •Process structure: the process table (11.0 and earlier)
• •Process structure: the process table (11i and later)
• •Process management: threads
• •Structure: the Kthread table (11i and later)
• •Process management: virtual address space (VAS)
• •Process management - preregions
• •Pregion skip lists
• •Adding a new pregion
• •Process management: UAREA (user structure)
• •Process thread states and flags
• •Priority values
• •HP-UX POSIX priorities
• •HP-UX SCHED_TIMESHARE priorities
• •All together now!
• •Thread scheduling - timeline
• •Time-shared thread priority adjustment
• •Adjusting a thread priority - review
• •Thread scheduling - swtch()
• •Thread scheduling - real_sleep()
• •Thread scheduling - real_wakeup()
• •Lab - process structures

Multiprocessor systems

• •Symmetric multiprocessor definition
• •Hardware overview
• •Multiprocessor (MP) data structures
• •Per processor data structures (CPU information)
• •Multiprocessor run queues
• •Uniprocessor data contention
• •Thread synchronization
• •Locking strategies
• •Spinlocks
• •Spinlock data structures
• •Load and clear word instruction
• •Semaphores
• •Partitions and virtual partitions
• •Locality domains
• •Processor sets
• •Processor scheduling on 11.0 and earlier
• •SPU load balancing on 11.0 and earlier
• •Processor scheduling on 11.11 and later
• •SPU Load balancing on 11.11 and later
• •Processor control

InterProcess communications

• •IPC introduction
• •IPC facilities
• •Process level semaphores
• •System V Application semaphores: data structures
• •System V undo: data structures
• •System V semaphores: kernel parameter limits
• •Message queues
• •Message queues: data structures
• •POSIX message queues: data structures
• •Shared memory and global virtual address space
• •System V shared memory: data structures
• •Shared memory: process attachment
• •POSIX shared memory
• •Memory mapped files and global virtual address space
• •Memory mapped files
• •32-bit and 64-bit shared data issues coexistence
• •Signals: an introduction
• •Signals structures: the big picture
• •Signal generation and delivery: kernel functions
• •Lab: Semaphore structures

Memory management

• •Data structure overview
• •Mapping a virtual address to a physical address
• •When multiple addresses hash to the same hash table entry
• •The pde/pte structure
• •Physical to virtual address translation
• •Mapping multiple virtual addresses to one physical address
• •Pregion structures and linked lists
• •The region structure
• •The root of the btree: broot structures
• •The bnode structures
• •Managing VFD;DBD pairs
• •Virtual frame descriptors
• •Disk block descriptors
• •Fork() - duplicating pregions with shared regions
• •Ford() - duplicating pregions with private regions
• •Fork() - copy-on-write first read mechanics
• •Fork() - copy-on-write first write mechanics
• •Virtual memory and exec()
• •Virtual memory and exit()
• •Bringing in a page the first time (demand paging)
• •Reclaiming pages from the free list
• •Retrieving pages from disk
• •Push pages out
• •Vhand: the page daemon
• •The two-handed clock algorithm
• •How much of the pregion to age and steal
• •Reserving swap space
• •Choosing a swap location
• •The swaptab/swapmap structure
• •Swapping using the pager
• •Lab: memory structures

File systems

• •File systems overview
• •The Bell File System
• •Problems with the Bell File system
• •The HFS File System
• •HFS disk-resident data structures
• •The Superblock
• •The Cylinder Group
• •Inodes
• •Blocks and fragments
• •Inodes and data blocks
• •Directories
• •Inode allocation
• •Block allocation
• •Lab: HFS structures
• •Problems with UFS
• •The Veritas Extended File System
• •JFS disk layout
• •The VxFS Superblock
• •The object location table
• •Filesets and headers
• •Inode allocation units
• •Free space management
• •The extent allocation unit state file
• •The extent allocation unit summary file
• •The extent allocation unit Freemap file
• •VxFS inode arrangement
• •The intent log
• •Logging levels
• •Completion records
• •Extended Inode operations
• •Directories
• •Lab: VxFS Structures
• •Kernel-based data structures
• •Vfs Structures
• •The mount structure for UFS file systems
• •The vx_vfs structure for VxFS file systems
• •File access data structures
• •File descriptors
• •The file table
• •The vnode structure
• •Inodes and the inode table
• •Locating in core Inodes
• •Vx_inodes
• •The buffer cache, overview
• •Buffer cache structures
• •Dynamic buffer cache
• •Accessing data through the buffer cache

Logical volume manager

• •LVM overview
• •LVM architecture
• •LVM disk layout: bootable
• •LVM disk layout: non-bootable
• •LVM disk structures: PVRA and BDRA
• •LVM disk structures: VGRA
• •LVM disk structures: VGDA (PVOL/LVOL structures)
• •Memory resident structures
• •LVMTAB file
• •Mirror write cache
• •Mirror write cache data structures
• •LVM-VxVM differences
• •LVM and IA-64

The I/O subsystem

• •Example topology of a legacy PA-RISC system
• •Example topology of a new PA-RISC or IPF system
• •System address space: 32-bit (PA-RISC)
• •System address space: 64-bit (PA-RISC)
• •System address space: 64-bit (IA-64)
• •Device files and the switch tables
• •The ioconfig file
• •Types of Drives
• •I/O request flow
• •Driver levels
• •The converged I/O system
• •Requirements for the HP-UX platform software
• •Overview: General I/O and context dependent I/O
• •Overview: Central bus CDIO
• •GIO objects
• •I/O tree object - GIO
• •CDIO interfaces
• •Inter-CDIO communications
• •CDIO types
• •Lab: I/O structures

System initialization

• •The beginning of system initialization
• •Overview: "The Big Picture"
• •Kernel initialization (Phase 0)
• •Kernel initialization (Phase 1)
• •Kernel initialization (Phase 2)

For organizational purchases, please send us a message at salesinfo@eno.com or complete and submit this form .

• Complete Training Catalog
• Oracle Applications Training and Consulting
• Peoplesoft Applications Training and Consulting
• SAP Applications Training and Consulting
• Security Technologies Training and Consulting
• Telecommunications Training and Consulting
• Wireless Technology Training and Consulting